For this exam, you may use your textbook, your notes and assignments, your brain, the Math/CS computers, and divine inspiration (if any is available to you). If you get stuck, talk to Jeff Ondich, but please don't talk to anyone else about the exam.

Explain and justify your answers. Submit your answers on paper.

1. (8 points) Floating point experiment number 1. Write a C/C++ program that sets a float-type variable x to 1.0, and then divides x by 2 until x is 0.0. For each iteration, print out x in decimal along with the 4-byte floating point representation of x (in hexadecimal).
   • How many iterations does it take for x to turn to zero?
   • The rightmost 16 bits of x are zero for many iterations. Why? After how many iterations do the rightmost 16 bits of x stop being zero? Why?
   
   
   
2. (7 points) Floating point experiment number 2.
   • When you set a float-type variable x to 0.1, what 32-bit value is put into x?
   • When you print x, does 0.1 appear on screen, or is it some close approximation of 0.1?
   • If you change the rightmost bit of x and then print x again, does the output change?
   • At the risk of answering the previous question for you, I'll ask this one: how drastically do you need to change the 32-bit value of x to change the output generated by "cout << x"?

   Show me the code you use to answer these questions.
   
   

3. (12 points) Consider the pipelined datapath of figure 6.30 on page 470 of Patterson and Hennessy. Suppose the following instructions are being executed:

   
   	add  $2, $3, $4
   	beq  $2, $5, 96
   	lw   $6, 192($7)
   	subi $6, $6, 24
   

   Suppose the subi instruction has been fetched (that is, it is now stored in the IF/ID pipeline register), and the clock is about to fall again (that is, the current clock cycle has gone on long enough that all of the elements of the datapath have completed their work for this cycle). As completely as you can, show the values stored in all the pipeline registers (including the saved control values), and on all the lines.

   You may assume that the contents of each register ($0 through $31) started out as triple the register number (so register 1 contains a 3, register 2 contains a 6, etc.). You may also assume that no register writes have occurred as the add instruction has made its way through the pipeline.
   
   

4. (3 points) I like to keep track of American pop culture a little bit, even though there's really no hope of my keeping up with or understanding it. Still, I'd like you to humor me by telling me what you think I should read or watch or listen to if I want to know what's happening in Popland these days.
   
   
5. (12 points) Consider the following caches, each of which can hold up to 16 32-bit words of data. Assume that addresses are 32 bits long.
   • A 16-entry direct-mapped cache with 1-word blocks.
   • A 4-entry direct-mapped cache with 4-word blocks.
   • A 4-entry 4-way set associative cache with 1-word blocks, using a "least recently used" strategy for choosing which block to evict.

   For each of these caches, answer the following questions.

   • Draw a diagram of the cache. How much memory does it use?
   • If the contents of the following addresses are requested in the indicated order, what words are in which entries at the end, and what is the hit ratio? Assume the cache starts out empty.

     	52, 13, 79, 57, 86, 12, 84, 14, 21,
     	102, 36, 25, 33, 26, 34, 98, 76, 38
     

     Note that these addresses are byte addresses--so byte 3 is contained in the word starting at address 0. Also, indicate a word by writing out its byte range (so the word starting at address 52, for example, would be written as "52-55").