This is a an exam. You may consult your notes, any book, and the Internet. You may not speak with any person other than Jeff Ondich, electronically or otherwise, about the content of this exam. If you obtain relevant information from any source other than yourself, cite your sources clearly. Justify your answers. (Note that "justify your answers" implies "show your work.") Have fun.
(10 points) Consider the following caches, each of which can hold up to sixty-four 32-bit words of data. Assume that addresses are 32 bits long.
For each of these caches, answer the following questions.
If the contents of the following addresses are requested in the indicated order, what words are in which entries at the end, and what is the hit ratio? Assume the cache starts out empty.
44, 32, 67, 5, 49, 290, 33, 100, 111, 112, 113, 160, 19, 162, 270, 35
Notes: (1) These addresses are byte addresses--so byte 23 is contained in the word starting at address 20. (2) Please indicate a word by writing out its byte range (so the word starting at address 52, for example, would be written as "52-55", and the four-word block starting at address 32 would be "32-47"). (3) These hit ratios are very low, both because the caches start out empty, and because I have made no effort to make my numbers adhere to the principles of spacial or temporal locality.
(10 points) Do problems 6.17, 6.18, and 6.19 on page 456 of Patterson and Hennessy. The best justification for your answers would involve a diagram of the relevant datapath, with appropriate labeling and explanation. In any case, don't just give me answers--give me justification as well.
(20 points) Design a datapath and control to implement the memory reference instructions (op-codes 0 through 5) of the PDP-8. You should submit:
(3 points) You don't have to recommend any books or websites or tell me jokes or anything. Just have a great break.
