Last updated: Fri Nov 11 15:59:49 2005
| Class | Date | Topic | Readings | Due |
|---|---|---|---|---|
| 1 | Monday, September 12 | General course info and historical stuff | Ch. 1, including 1.7 (CD) (read before Wednesday) | |
| 2 | Wednesday, September 14 | Instruction set design; the MIPS instruction set | Ch. 2.1-2.2 | Assignment 1 |
| 3 | Friday, September 16 | Arithmetic, logic, and memory instructions | Ch. 2.2, 2.3, 2.5 | |
| 4 | Monday, September 19 | Opcodes, instruction types, branching | Ch. 2.4, 2.6 | |
| 5 | Wednesday, September 21 | Branching, procedures, memory structure | Ch. 2.6, 2.7, 2.9 | |
| 6 | Friday, September 23 | Lab: PDP-8 | Handout | Assignment 2 |
| 7 | Monday, September 26 | PDP-8 architecture | Handout | |
| 8 | Wednesday, September 28 | IA-32 architecture | Ch. 2.16 | Lab 1 |
| 9 | Friday, September 30 | Number representation and arithmetic in MIPS and PAL | Ch. 3.1-3.3 | |
| 10 | Monday, October 3 | Multiplication and division in MIPS | Ch. 3.4, 3.5 | |
| 11 | Wednesday, October 5 | Floating point numbers and arithmetic | Ch. 3.6-3.8 | |
| 12 | Friday, October 7 | Floating point addition/multiplication; IA-32 FP architecture | Ch. 3.6-3.8 | EXAM 1 (take-home), due by 5:00pm |
| 13 | Monday, October 10 | Digital logic | Appendix B.1-B.2 (CD) | |
| 14 | Wednesday, October 12 | Combinational logic | Appendix B.3 (CD) | |
| 15 | Friday, October 14 | ALU design | Appendix B.5 (CD) | Assignment 3, due by 5:00pm |
| Monday, October 17 | Midterm break: no class | n/a | ||
| 16 | Wednesday, October 19 | Sequential logic | Appendix B.7-B.8, B.10-B.11 (CD) | |
| 17 | Friday, October 21 | Sequential logic | ||
| 18 | Monday, October 24 | Lab: Performance | Ch. 4 | |
| 19 | Wednesday, October 26 | Performance | Ch. 4 | Assignment 4 |
| 20 | Friday, October 28 | Datapath and control | Ch. 5.1-5.4 | |
| 21 | Monday, October 31 | Datapath and control | Ch. 5.1-5.4 | Assignment 5; Exam 2 assigned |
| 22 | Wednesday, November 2 | Datapath and control | Ch. 5.4-5.5 | |
| 23 | Friday, November 4 | Pipelining | Ch. 6.1-6.6 | EXAM 2 (take-home) due by 5:00pm |
| 24 | Monday, November 7 | Memory | Ch. 7 | |
| 25 | Wednesday, November 9 | Memory | Ch. 7 | |
| 26 | Friday, November 11 | Memory | Ch. 7 | 27 | Monday, November 14 | I/O; advanced logic design topics | Ch. 8.1-8.2, 8.4-8.5, 8.6 (optional) | Assignment 6 |
| 28 | Wednesday, November 16 | Logic design; Course wrap-up; take-home final assigned | n/a | |
| Monday, November 21 | FINAL EXAM DUE BY 5:00 pm | n/a |